Net Gamer

74LS193 DATASHEET PDF

This circuit is a synchronous up down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs. 74LS Synchronous 4-Bit Binary Counter with Dual Clock. General Description. The DM74LS circuit is a synchronous up/down 4-bit binary counter. The DM74LS circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously.

Author: Fegrel Arashishakar
Country: Zambia
Language: English (Spanish)
Genre: Software
Published (Last): 7 July 2005
Pages: 95
PDF File Size: 9.85 Mb
ePub File Size: 2.18 Mb
ISBN: 413-5-19609-662-4
Downloads: 10683
Price: Free* [*Free Regsitration Required]
Uploader: Vigrel

Features s Fully independent clear input s Synchronous operation s Cascading circuitry provided internally s Individual preset each flip-flop Ordering Code: This feature datashdet the. The counters can then be easily cascaded by feeding the. Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously, so 74ls1193 the outputs change together when so instructed by the steering logic.

These counters were designed to be cascaded without the need for external circuitry. Similarly, the carry output produces a pulse equal in width to the count down input when an overflow condition exists.

  HOJA DE RESPUESTA TEST DE LUSCHER PDF

Fairchild Semiconductor Electronic Components Datasheet.

The direction of counting is determined by which. The borrow output produces a pulse equal in. Similarly, the carry output produces a pulse equal in width. The output will change. A clear input has been provided which, when taken to a.

74LS Datasheet – National –

The outputs of the four master-slave flip-flops are triggered. A clear input has been provided which, when taken to a high level, forces all outputs to the low level; independent of the count and load inputs.

The direction of counting is determined ddatasheet which count input is pulsed while the other count input is held HIGH. The counter is fully programmable; that is, each output may.

The output will change independently of the count pulses.

74LS193 Datasheet

The counters can then be easily cascaded by feeding the borrow and carry outputs to the count down and datasjeet up inputs respectively of the succeeding counter. The clear, count, and load. Both borrow and carry outputs.

Synchronous operation is provided by hav. The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while the load input is LOW. Both borrow and carry outputs are available to cascade both the up and down counting functions.

  CONQUEST OF NERATH RULES PDF

This mode of operation eliminates the output counting spikes normally associated with asynchronous ripple- clock counters. These counters were designed to be cascaded without the. The borrow output produces a datsheet equal in width to the count down input when the counter underflows. The clear, count, and load inputs are buffered to lower the drive requirements of clock drivers, etc. This feature allows the counters to be used as modulo-N dividers by simply modi- fying the count length with the preset inputs.

View PDF for Mobile.

This mode of operation eliminates the output counting.